Race Result Details |
Racer | Drake (coloneldrake) |
Race Number | 83 |
Date | Tue, 11 Jun 2019 6:44:37 |
Speed |
51 WPM
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Accuracy | 96.5% |
Rank | 1st place (out of 2) |
Text typed:
In synchronous communications, the sender and receiver must synchronize with one another before data is sent. To maintain clock synchronization over long periods, a special bit-transition pattern is embedded in the digital signal that assists in maintaining the timing between sender and receiver.
— (book)
by Tom Sheldon
(see stats)
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