Guest
Race Result Details |
| Racer | Michael (tryagain5x) |
| Race Number | 48 |
| Date | Sat, 27 Oct 2018 1:22:36 |
| Speed |
49 WPM
 Try to beat?
|
| Accuracy | 92% |
| Rank | 2nd place (out of 5) |
| Opponents | michael_liw (3rd place) |
Text typed:
|
In synchronous communications, the sender and receiver must synchronize with one another before data is sent. To maintain clock synchronization over long periods, a special bit-transition pattern is embedded in the digital signal that assists in maintaining the timing between sender and receiver.
— (book)
by Tom Sheldon
(see stats)
|